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ISL6561 LO566T C9015 12063 C9015 HA1199P 330K16V3 GRM31C
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  data and sp e a e featu r integrate input vol t ultra-low low thr e quick o u esd per f 2kv hb m halogen applic te l e c o m industria l consum e noteboo k typic a e cifications s u a dvan c e lectro n r es d 6a single c t age range: on-resist a e shold contr o u tput discha r f ormance te s m and 1kv c free produ c ations systems l systems e r electronic s k s / netbook a l appli v in u bject to chan g c ed po w n ics c o c hannel lo a 0.8v to 5.5 v a nce r on = 4 o l inpu t r ge transist o s ted per je s c dm ct s s cation c in 1uf g e without no t w e r o r p . fa s a d switch v .5m ? o r s d 22 vin en t ice s t re s de s the a with c mos rang e conti n by a interf a a ddit resis t switc h the a with s ape893 9 vbias +5v / +3.3 v s pons e s cripti o a pe8939 is c ontrolled t u fet that c a e of 0.8v n uous curre n a n on/off i n a cing directl y i onal featur e t or is added h is turned o a pe8939 is s mallest co m gnd 9 vout v e , 6 a l o n a small, ult r u rn on. it c o a n operate o to 5.5v a n n t up to 6a. t n put (en), y with low-v o e s include for output ff. available in m ponents. c out 0.1uf ap l oad s r a-low r on l o o ntains one o ver an in p n d support t he switch i s which is c o ltage contro a 330 ? on quick disch a dfn 3x3-8 v out 1 20150508v 6 e8939 s witch o ad switch n-channel p ut voltage maximum s controlled c apable of l signals. -chip load a rge when l package 1 6 .
a e order ape893 9 absol u vin vout en vbias i max storage te junction t e lead tem p thermal r e thermal r e reco m vin vbias vout cin junction t e operating t power dis s a dvan c e lectro n ing / p a packa g gn3: d 9 x u te ma x mperature r e mperature ( p erature (sol e sistance fro e sistance fro m mende d e mperature ( t emperatur e s ipation (p d @ c ed po w n ics c o a ckage g e typ e d fn 3x3-8l x imum r r ange (t st ) t j ) dering, 10s e m junction t m junction t d oper a t j ) e range @ t a =25 o c) w e r o rp. infor m r ating s e c.) t o ambient ( r dfn 3x 3 t o case(top dfn 3x 3 a ting c m ation v s (at t a =25 c r ja ) 3 -8l case) (r j c 3 -8l c onditi o 0.8 v 2.5 v . v in R 0. 125 -40 2.3 w 1 2 3 4 v bias en vin vin c ) -0.3v to vin+0.3 v -0.3v to -0.3 to 6 v 6a -65 to + 1 150c 260c 43c/w c ) 42c/w o ns v to 5.5v v to 5.5v (v b 1uf c c to 85c w dfn 3x3-8l top view exposed pad v i n 6v v 6v v 1 50c b ias R vin) ap 5 6 7 8 n v o u v o u v o u gn d 2 e8939 u t u t ut d 2 .
a e elect r (v in =0.8v t o p quiescent c shutdown c on resista rise time soft-start t i output pull - en input l e en thresh o a dvan c e lectro n r ical s p o 5.5v, v bias = p aramete r c urrent c urrent nce i me - down resi s e akage curr e o ld c ed po w n ics c o p ecific a = 5v, c in =1u f r s tance e n t w e r o rp. a tions f , c out =0.1 u sym i bias v b i v b i i sd v e n r on vi n vi n -4 0 vi n vi n -4 0 vi n vi n -4 0 vi n vi n -4 0 vi n vi n -4 0 vi n vi n -4 0 t r v i n t ss v i n r opd v i n i en v e n v ih on v il off uf , t a =25c test c o i as =v in =v en = i as =v in =v en = n =gnd n =5v, iout = n =5v, iout = 0 o c < t a < 8 5 n =3.3v, iou t n =3.3v, iou t 0 o c < t a < 8 5 n =1.8v, iou t n =1.8v, iou t 0 o c < t a < 8 5 n =1.5v, iou t n =1.5v, iou t 0 o c < t a < 8 5 n =1.05v, io u n =1.05v, io u 0 o c < t a < 8 5 n =0.8v, iou t n =0.8v, iou t 0 o c < t a < 8 5 n =1.05v, r l = n =1.05v, r l = n =5v, v en =0 v n =5v or gn d , unless oth e o ndition = 5v, i out =0a = 3.3v, i out = 0 = -200ma = -200ma, 5 o c t =-200ma t =-200ma, 5 o c t =-200ma t =-200ma, 5 o c t =-200ma t =-200ma, 5 o c u t=-200ma u t=-200ma , 5 o c t =-200ma t =-200ma, 5 o c 10 10 v d e rwise speci f min 0 a , 7 1.3 ap f ied) typ m a 30 5 20 3 4.9 1 4.8 7 1 4.6 7 1 4.6 7 1 4.5 7 1 4.5 7 1 14 2 40 5 330 4 0 3 e8939 ax unit 5 0 ua 3 3 ua 1 ua 8 m ? 1 0 m ? 7 .8 m ? 1 0 m ? 7 .3 m ? 1 0 m ? 7 .3 m ? 1 0 m ? 7 .2 m ? 1 0 m ? 7 .2 m ? 1 0 m ? 2 0 us 5 0 us 00 ? 1 ua v 0 .5 v 3 .
a e pin de s pin no. 1, 2 3 4 5 6, 7, 8 expose d pad block en vbias a dvan c e lectro n s cripti o pin s v vb e g vo d v diagr a o s cha r c ed po w n ics c o o ns ymbol v in i b ias b e n s g nd g o ut s v in i a m s cillato r r ge pump w e r o rp. i nput power b ias voltag e s witch contr g round s witch outp u i nput power cont r logi supply e ol input, acti v u t supply r ol c pin des c v e high. do n output di c ription n ot leave flo a scharge ap a ting. 4 e8939 vin vout gnd 4 .
a e typic a 0 500 1000 1500 2000 2500 0. 8 s oft-s tart tim e (us ) 0us 100us 200us 300us 400us 0.80 v toff 0us 40us 80us 120us 160us 200us 0.80 v td-on a dvan c e lectro n a l perf o fig.1 soft- s fig.3 fig.5 8 1.8 v 1.80v 2 i v 1.80v 2 vbias=5v, cin=1uf, cout = c ed po w n ics c o o rman c s tart time v s t off vs. v in t d-on vs. v in 2.8 3.8 vin (v) 2 .80v 3.80v nput voltage 2 .80v 3.80v input voltage = 0.1uf w e r o rp. c e cha r s . v in 4.8 4.80v 5. 8 vbias=5v vbias=3. 3 4.80v 5. 8 vbias=5 v vbias=3. 3 r acter 5.8 soft start time (us) 8 0v 3 t f 8 0v v 3 tr istics fig. 2 0 2000 4000 6000 8000 10000 0.8 soft - start time (us) 0us 100us 200us 300us 400us 0.80v t f 0us 2000us 4000us 6000us 8000us 10000us 0.80v tr vb i cin 2 soft-star t fig.4 t f fig.6 t r 1.8 2.8 1.80v 2.80v input v 1.80v 2.80 v inp u i as=3.3v, =1uf, cout=0.1u ap t time vs. v i vs. v in vs. v in 3.8 vin (v) 3.80v 4 . oltage v 3.80v 4 u t voltage f 5 e8939 n 4.8 5.8 . 80v 5.80v vbias=5v vbias=3.3 .80v 5.80v vbias=5v vbias=3.3 5 .
a e typic a fig.1 1 4.0m 4.4m 4.8m 5.2m 5.6m 6.0m 6.4m 0.8 v ron 0us 500us 1000us 1500us 2000us 2500us 3000us 0.80 v ton 0.0ua 10.0ua 20.0ua 30.0ua 40.0ua 50.0ua -50 quiescent current a dvan c e lectro n a l perf o fig.7 fig.9 1 vbias c u v 1.8v v 1.80v 0 a c ed po w n ics c o o rman c r on vs. v in t on vs. v in u rrent vs. te 2.8v 3.8v input voltage 2.80v 3.80v input voltage 50 a mbient temperature w e r o rp. c e cha r mperature 4.8v 5 vbias=3.3 v vbias=5v 4.80v 5. 8 vbias=5v vbias=3. 3 100 1 5 vbias=5v vbias=3. 3 r acter 5 .8v v ron 8 0v 3 i sd 5 0 3 enable voltage istics fig . fig.12 e 3m 4m 5m 6m 7m -50 ron 0.00ua 0.04ua 0.08ua 0.12ua 0.16ua 0.20ua 0.8 i sd 0.00v 0.50v 1.00v 1.50v 2.00v 2.50v -50 enable voltage . 8 r on vs. t fig.10 i s d e n threshol d 0 5 tem p 1.8 2.8 inp u 0 5 a mbient t ap t emperatur e d vs. v in d vs. tempe 5 0 100 p erature 3.8 u t voltage 5 0 100 t emperature 6 e8939 e rature vin=1.05v vin=1.8v vin=2.5v 4.8 5.8 vbias=5v vbias=3.3 vih vil 6 .
a e typic a fig.1 fig.1 a dvan c e lectro n a l perf o 3 enable w 5 enable w c ed po w n ics c o o rman c w aveform, v w aveform, v v c r v b ci n r l w e r o rp. c e cha r v in=1.05v v in=1.05v bias=5v, in=1u f , cout= 0 l=10 b ias=3.3v, n =1u f , cout=0. l =10 r acter 0 .1uf 1uf istics fig.14 fig.16 enable w a enable wa v ap a veform, vin v eform, vin = vbias = cin=1u f rl=10 7 e8939 =5v = 5.0v = 5v, f , cout=0.1uf 7 .
a e applic on/off co n the load s w capable of i gpio logic the figure 1 t ss : soft sta t d-on : vou t t r : vout ri s t d-off : vou t t f : vout fa e n vo u output sw the switch vin 0.80v 1.05v 1.50v 1.80v 2.50v 3.30v 5.00v a dvan c e lectro n ation i n n trol w itch is con t nterfacing w threshold. d 1 7 shows th e rt time t turn on del a s e time t turn off de l ll time n u t itch time c o time shows o td-o 2 2 2 2 2 2 2 c ed po w n ics c o n form a t rolled by th e ith low volta g d o not leave t e vout on/ o a y l ay t o n 1% t d- o n o ntrol o n below ta b n(us) 2 5 2 5 2 6 2 5 2 6 2 4 2 3 w e r o rp. a tion e en pin. t h g e signals. t t he en pin fl o o ff definition. n t r 10% 50 % t s s fig.17 b le 1 are typ tr(us) 11 14 19 26 40 127 2055 h e en pin i s t he en pin c a o at. 90% % on/off w ical measur e vb v t ss (us) 41 43 48 57 68 164 2080 table 1 s active hig h a n be used w w aveform e d value. pl e ias=5v v out ton( u 34 36 39 40 43 48 68 h and has a w ith standar d 90 % t off e ase refer it f u s) to f 8 8 8 8 7 ap low thresh o d 1.5v, 1.8v, 2 t f % 1 0 50% f or determin e f f(us) 9 9 8 .88 8 .96 8 .54 8 .32 7 .9 8 e8939 o ld making i t 2 .5v or 3.3 v 0 % e d rise time. tf(us) 13.2 11.4 12.7 12.2 11.8 11.1 12.2 8 t v .
a e input cap a an input ca supply duri n output ca p setting a c switch, this removed. layout co n follow the b 1. keep t h 2. the in p inducta 3. place t h a dvan c e lectro n a cito r pacitor is re c n g high curr e p acito r c in greater t h prevents th e n sideration s b elow guidel h e high curr e p ut and outp u nces. h e thermal v i c ed po w n ics c o c ommended e nt applicati o h an the c ou t e current flo w s ines for pc b e nt paths (vi n u t capacitor s i as under th e w e r o rp. to be place d o n. t is highly r e w s through t h b layout to a c n , vout an d s should be c e exposed p a fig. 1 d between v e commende d h e body dio d c hieve stabl e d gnd) wid e c lose to the d a d. this hel p 1 8 refere n in and gnd d . since the d e from vo u e operation. t e and short t o d evice as p o p for thermal n ce layout to limit the v internal bo d u t to vin w h t ake below f o obtain the o ssible to mi n diffusion a w ap v oltage drop d y diode is i n h en the syst e f igure for ref e best effect. n imize the p a w ay from the d 9 e8939 on the inpu t n the nmo s e m supply i s e rence. a rasitic trac e d evice. 9 t s s e .
a e marki n dfn 3x3-8 l 89 3 y w w a dvan c e lectro n n g info l 39 gn3 w ss s c ed po w n ics c o rmatio w e r o rp. n part numb e date code ( y : year ww : week sss : sequ e package c o e r ywwsss) e nc e o de ap 1 0 e8939 0 .


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